Imagine the scenario: an important surveillance asset or other battlefield asset is captured and the enemy starts probing the circuit board for data connections and communication capabilities to try and reverse engineer the system. Important electronic military assets need some measures for physical layer security at the board level and at the firmware level to prevent this type of tampering. These security measures span beyond mission-critical battlefield systems and include government WiFi networks, cellular networks, premises that hold important IT assets, networking equipment, and much more.
At the PCB level, physical layer security measures can be designed to detect and report tampering, or even to disable a device upon tampering. As part of a Defense in Depth strategy, there are some simple design choices that can provide physical layer security for Internet of Things (IoT) devices used by the military or any other organization that wants to prevent and detect tampering. Using an additive manufacturing system to implement physical layer security in IoT devices provides greater design freedom and security for sensitive systems.
You can implement physical layer security in IoT devices with the right design and manufacturing techniques.
Board-level Physical Layer Security for IoT Devices
Security at the firmware/software and wireless communications level is its own beast that requires encryption, frequency hopping, or other measures to prevent an unauthorized party from receiving and reading important information. At the board level, physical layer security measures are intended to prevent probing circuits, prevent reverse engineering of a system, or disable a device should the system be tampered with. Here are some of the goals of physical layer security and how they can be implemented:
Disable the Device Upon Tampering
The simplest way to prevent tampering is to place a lock on the enclosure, but this can easily be defeated with the right hand tools. In addition to designing a tamper-resistant enclosure for electronic systems that carry sensitive information, preventing tampering can involve disabling a device. It may be desirable to wipe the system’s memory or destroy sensitive components in the event the device is tampered with.
This is most easily done by triggering an electrostatic discharge or short circuit in the event an enclosure is opened. This can disable or destroy critical components in the board in the event a device is captured. Another option for a board that must run with perpetual uptime is to design a fuse or switch in the enclosure. If the enclosure is ever opened, the switch/fuse can cut power to the rest of the board and send an alert to a base station.
Prevent Probing of Conductors
Conductors that carry data or analog signals can be probed with a test instrument, and probing should be prevented to ensure data security. An easy way to do this is to simply bury conductors in the internal layers of a multilayer board. Using stripline routing is desirable for high speed and high frequency signals, and it provides the added benefit traces cannot be probed without destroying the board.
Similarly, designing a unique buried via architecture in the interior layers can eliminate access points. In typical multilayer PCBs, this would involve using buried vias with non-conductive fill between interior layers. For any vias that reach the surface layer, these vias would need to be completely covered in thick solder mask to prevent tampering, and only vias that do not carry sensitive signals should be allowed to reach the surface layer.
